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Name of Subject : COMPUTER ARCHITECTURE |
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( 5 CS 2) |
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Unit |
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Contents |
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REGISTER TRANSFER LANGUAGE: Data |
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movement around registers. Data movement from/to memory, arithmetic |
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I |
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and logic micro operations. Concept of bus and timing in register transfer. |
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CPU ORGANISATION: Addressing |
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Modes, Instruction Format. CPU organization with large registers, stacks and |
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II |
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handling of interrupts & subroutines Instruction pipelining |
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ARITHMETIC ALGORITHM: Array multiplier, Booth's algorithm. Addition subtraction for signed unsigned numbers |
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III |
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and 2's complement numbers. |
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MICROPROGRAMMED CONTROL UNIT : |
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Basic organization of micro-programmed controller, Horizontal & Vertical |
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IV |
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formats, Address sequencer |
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MEMORY ORGANISATION: Concept |
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of RAM/ROM, basic cell of RAM, Associative memory, Cache memory |
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organization, Vertical memory organization. I/O ORGANISATION: Introduction |
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to Peripherals & their interfacing. |
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V |
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Strobe based and handshake-based communication, DMA based data transfer, I/O processor. |