7 CS 9 .

LOGIC SYNTHESIS LAB

1.  Write a program which reads simple digital circuit (of size up to 10 gates) in blif / Boolean equation and display

schematic in graphics format.

2.  Write a program to convert Blif format into Boolean equation.

3.  Write a program that estimate area of circuit (specified as Blif or Boolean equation) using library binding technique of

simple circuit (up to 10 gates).

4.  Write a program to implement state machine up to 5 states.

5.  Write a program to count 4-input lookup table in a simple circuit (up to 10 gates specified as  Blif or Boolean equation).

6.  Write a program to obtain sequencing graph for a given set of arithmetic expression (up to 10 nodes)

7.  Write VHDL Codes for all gates with all Modeling.

8.  Write VHDL Codes & Test bench for half adder and full adder